The present invention relates to a phase synchronizing circuit including a phaselock loop for use in communication systems.
Phaselock loops find extensive applications in, for example, synchronizing circuits, frequency demodulators, PSK demodulators, frequency synthesizers, etc. In a prior art basic phaselock loop, a phase comparator compares the phase of an input signal with that of an output signal and a loop filter smoothes the comparison output from the comparator to control a voltage controlled oscillator (VCO) whose output constitutes the output signal mentioned above. However, only a limited range of pull-in frequencies is available with the prior art basic phaselock loop. Should the initial frequency error (the difference frequency between the input and output signals) be outside the pull-in frequency range, it would be impossible to establish phase synchronization. Such a basic phaselock loop, therefore, must often be aided by additional pull-in means as typified by frequency sweep. Furthermore, difficulty has been experienced in adopting the phaselock loop into, for example, a PSK demodulator in a time division multiplex access (TDMA) communication system where fast pull-in is required for a burst operation.